Change: Hive Interface 0.3

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Revision as of 01:55, 21 December 2017 by Paul (talk | contribs) (Created page with "*Add Chip Select to SPI (GPIO 10 SPI0_CE0) to H7. This is for the AD7124-8 Eval Board. Currently: {| class="wikitable" ! scope="row" colspan="2"| H7 SPI ver 0.3 |- ! scope="c...")
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  • Add Chip Select to SPI (GPIO 10 SPI0_CE0) to H7. This is for the AD7124-8 Eval Board. Currently:
H7 SPI ver 0.3
Pin Signal
1 +3.3
2 SPI0 11 SPI0 CLK
3 GPIO 13 SPI0 MISO
4 GPIO 12 SPI0 MOSI
5 Ground

Currently:

H2 I2C Bus
Pin Signal
1 +5
2 +3.3
3 I2C
4 I2C
5 Ground

New (but remove + 5 and make Pin 5 NC:

Old H2 I2C Bus New H2 for RTC
Pin Signal New Pin
1 +5 No connect
2 +3.3 Pin 1 of H2
3 I2C Pin 2 of H2
4 I2C Pin 3 of H2
5 Ground No connect
Ground for C Ground Pin 5 of H2