Difference between revisions of "Change: Hive Interface 0.3"
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{| class="wikitable" | {| class="wikitable" | ||
− | ! scope="row" colspan="2"| H7 SPI ver 0. | + | ! scope="row" colspan="2"| H7 SPI ver 0.5 |
|- | |- | ||
! scope="col"| Pin | ! scope="col"| Pin | ||
Line 108: | Line 108: | ||
| Ground | | Ground | ||
| Pin 5 of H2 | | Pin 5 of H2 | ||
+ | |} | ||
+ | |||
+ | |||
+ | |||
+ | {| class="wikitable" | ||
+ | ! scope="row" colspan="2"| H2 I2C Bus ver 0.5 | ||
+ | |- | ||
+ | ! scope="col"| Pin | ||
+ | ! scope="col"| Signal | ||
+ | |- | ||
+ | | 1 | ||
+ | | +3.3 | ||
+ | |- | ||
+ | | 2 | ||
+ | | I2XC | ||
+ | |- | ||
+ | | 3 | ||
+ | | I2C | ||
+ | |- | ||
+ | | 4 | ||
+ | | NC | ||
+ | |- | ||
+ | | 5 | ||
+ | | Ground | ||
|} | |} |
Revision as of 17:22, 23 April 2018
- Change GPIO pin for LED from pin 7 (default 1-wire) to pin 11.
- Increase hole size for blue 12 VDC power connector.
- Add Chip Select to SPI (GPIO 10 SPI0_CE0) to H7. This is for the AD7124-8 Eval Board. Currently:
H7 SPI ver 0.3 | |
---|---|
Pin | Signal |
1 | +3.3 |
2 | GPIO 14 SPIO CLK |
3 | GPIO 13 SPIO MISO |
4 | GPIO 12 SPIO MOSI |
5 | Ground |
H7 SPI ver 0.5 | |
---|---|
Pin | Signal |
1 | +3.3 |
2 | GPIO 14 SPIO CLK |
3 | GPIO 13 SPIO MISO |
4 | GPIO 12 SPIO MOSI |
5 | GPIO 10 SPIO CE0 |
6 | Ground |
- Change pins on H2 I2C so RTC will plug in. Remove +5 VDC from Pin 1. Move ground on C?. See http://hivetool.org/w/index.php?title=Real_Time_Clock_RTC
Currently:
H2 I2C Bus | |
---|---|
Pin | Signal |
1 | +5 |
2 | +3.3 |
3 | I2C |
4 | I2C |
5 | Ground |
New (but remove + 5 and make Pin 5 NC:
Old H2 I2C Bus | New H2 for RTC | |
---|---|---|
Pin | Signal | New Pin |
1 | +5 | No connect |
2 | +3.3 | Pin 1 of H2 |
3 | I2C | Pin 2 of H2 |
4 | I2C | Pin 3 of H2 |
5 | Ground | No connect |
Ground for C | Ground | Pin 5 of H2 |
H2 I2C Bus ver 0.5 | |
---|---|
Pin | Signal |
1 | +3.3 |
2 | I2XC |
3 | I2C |
4 | NC |
5 | Ground |